Memory devices are available in a variety of styles and sizes. Some memory devices are volatile in nature and cannot retain data without an active power supply. A typical volatile memory is a DRAM which includes memory cells formed as capacitors. A charge, or lack of charge, on the capacitors indicate a binary state of data stored in the memory cell. Dynamic memory devices require more effort to retain data than non-volatile memories, but are typically faster to read and write.
Non-volatile memory devices are also available in different configurations. For example, floating gate memory devices are non-volatile memories that use floating gate transistors to store data. The data is written to the memory cells by changing a threshold voltage of the transistor and is retained when the power is removed. The transistors can be erased to restore the threshold voltage of the transistor. The memory may be arranged in erase blocks where all of the memory cells in an erase block are erased at one time. These non-volatile memory devices are commonly referred to as flash memories.
The non-volatile memory cells are fabricated as floating gate memory cells and include a source region and a drain region that is laterally spaced apart from the source region to form an intermediate channel region. The source and drain regions are formed in a common horizontal plane of a silicon substrate. A floating gate, typically made of doped polysilicon, is disposed over the channel region and is electrically isolated from the other cell elements by oxide. For example, gate oxide can be formed between the floating gate and the channel region. A control gate is located over the floating gate and can also made of doped polysilicon. The control gate is electrically separated from the floating gate by another dielectric layer. Thus, the floating gate is “floating” in dielectric so that it is insulated from both the channel and the control gate.
In high performance flash memories, such as synchronous flash memories, large loads are selected in the memory array during a read or write cycle. These loads must be selected in a very short time. Further, as components continue to shrink, and as operating power continues to decrease, components that consume less power are also needed. In high performance memories, on each bitline of a memory array, there are gates for access transistors. In modern memories, there are on the order of 4000 bitlines. Each bitline has a pass transistor between a global bitline and the local bitline that is turned on for memory access in an active cycle of the memory. Turning on 4000 transistors creates a large capacitance that is turned on and off during each shift from bank to bank of a memory array during a read cycle of the memory. Typically, this row activation occurs every 20 nanoseconds. This can consume on the order of 10 or more milliamps of current.
A pumped voltage circuit supplies a voltage Vpx for the gates of the pass transistors. This pumped voltage uses a supply voltage for the memory as its source. As supply voltages continue to drop, presently to on the order of 1.6 to 1.8 volts, pumping Vpx to about 5 volts becomes increasingly less power efficient, especially if there is a current drain due to the large capacitance of 4000 bitline transistors, since Vpx is a pumped voltage and not a supply voltage. This pumped voltage is quickly drained of an unacceptable amount of current if it is used to supply the current required for loading 4000 bitlines. To supply 10 milliamps from the pumped voltage circuit requires on the order of 30 milliamps from Vcc, which yields very low power efficiencies. The current that gets used for Vpx is very expensive.
The gates on the pass transistors need to be pulled up to Vcc quickly to allow gate selection and activation within the very short time periods used in flash memories. Once a potential at or near Vcc is present at the gates, they need to be raised to a voltage slightly above Vcc, but time is not as critical for the final increase.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a driver that does not tax the current of a pumped gate voltage supply.